ls2k0500
ls2k0500
a highly integrated low-power soc for industrial control, printing terminals, bmc etc. it integrates la264, ddr3 controller, pcie2.0, sata2.0, usb3.0/2.0, gmac, audio and video interface, printer interface, and other common interfaces.
ls2k0500 specification
frequency
500mhz
number of cores
1
number of cores
1
processor core
64-bit superscalar processor core la264; supporting loongarch® instruction set architecture; 2-issue out-of-order execution; 2 fixed-point units, 1 float-point units, and 1 memory access units
high-speed cache
a 32kb private l1 instruction cache and a 32kb private l1 data cache;512kb l2 cache.
high-speed cache
a 32kb private l1 instruction cache and a 32kb private l1 data cache;512kb l2 cache.
memory controller
32-bit ddr3-800 controller;
high-speed i/o
pcie2.0, sata2.0, usb3.0, usb2.0, gmac
i/o
pci, spi, print, uart, gpio, ps/2, pwm, i2c, can, lio, dvo, hda/ac97, sdio, nand, lpc
power management
supporting dynamic frequency scaling in main clock domains; supporting dynamic voltage scaling in main voltage domains.
typical power consumption
1-3w
